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The composite video output is driven directly into the video modulator. Most video modulators have a capacitor in series with the input to negate any dc voltage offsets. To avoid any problems with RC delays in the composite video signal, I tried to keep the output impedance as close to 75 as I could (without having to resort to buffering the analog output from the PIC microcontroller). This is the reason for the relatively low resistances in the digital-to-analog circuit in this project. Normally, when producing analog voltages using a voltage divider circuit (as I use in this project), I would tend to use values in the tens of kilo-ohms. TV circuitry is normally designed to work with low characteristic impedance signals, so resistors in the 10-k range would have problems providing crisp changes in voltage levels to the video modulator with its input capacitor. To nd the resistor levels, I rst calculated the proper values in a circuit that connected the resistors to ground directly (and not through an open-drain I/O pin). I then wired the circuit as shown Fig. 21.53 and found that the voltages had changed somewhat (actually, I just had to change the resistor always pulling to ground to 150 ). After calculating the expected values for the resistors, I then put the proposed circuit on a breadboard and wrote a small application to test out the voltage output. This application simply pulled RB1, RB3, and RB4 to ground and allows me to monitor the voltage levels output by the voltage divider. The application that I used was VLadder application taken from Chap. 20. Using this application with an oscilloscope allowed me to verify the voltage levels output from the composite video generator circuit. The I/O pins RB1, RB3, and RB4 may seem strangely arbitrary, but they were used because they simpli ed the wiring of my prototype on the SimmStick. Depending on the method you use to build your own circuit, you may want to change the speci ed I/O pins to keep your wiring as simple as possible. With the circuit built, I then created video1.asm, which can be found in the code\video folder. Video1 creates the various signal timings to produce the composite video output for the two elds that make up a frame. As I indicated earlier, 59.94 NTSC composite video elds are sent each second. Each frame is made up of two of these elds, each of the second eld s raster placed in between the rasters of the rst eld. This creates a richer display with fewer visible raster scan lines than if a single eld were used for a frame. To start the vertical blanking interval, a set of half lines is sent. This line is 31.8 s in length with a 2.2- s synch at its start. For the rst eld of the frame, seven of these lines are sent, and six are sent in the second eld. Next, a reverse image is sent as the vertical synch, with 2.2- s porch voltage and the remaining 29.6 s at 0 V. Six vertical synchs are output for both elds of the frame. Finally, 10 (for the rst eld) or 11 (for the second eld) half lines are sent. For this application, which runs the PIC microcontroller at 16 MHz (with a 250-ns instruction cycle time), 127 instruction cycles were used for each line. After the vertical blanking interval, 243 video data lines were sent using the speci cations I outlined earlier. To produce a 63.5- s line period, 254 instruction cycles were used for each line. Video1 was relatively easy to create, and I was able to get it working in an evening with just a few minutes of debug because I had done a lot of simulation of the application
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