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SINUSOIDAL STEADY-STATE CIRCUIT ANALYSIS
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Z11 4 Z21 Z31
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Z12 Z22 Z32
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32 3 2 3 Z13 I1 V1 Z23 54 I2 5 4 V2 5 Z33 I3 V3
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for the unknown mesh currents I1 ; I2 ; I3 . Here, Z11  ZA ZB , the self-impedance of mesh 1, is the sum of all impedances through which I1 passes. Similarly, Z22  ZB ZC ZD and Z33  ZD ZE are the self-impedances of meshes 2 and 3.
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Fig. 9-12
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The 1,2-element of the Z-matrix is de ned as: X Z12  (impedance common to I1 and I2 where a summand takes the plus sign if the two currents pass through the impedance in the same direction, and takes the minus sign in the opposite case. It follows that, invariably, Z12 Z21 . In Fig. 9-12, I1 and I2 thread ZB in opposite directions, whence Z12 Z21 ZB Similarly, Z13 Z31  Z23 Z23  X X (impedance common to I1 and I3 0 (impedance common to I2 and I3 ZD
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The Z-matrix is symmetric. In the V-column on the right-hand side of the equation, the entries Vk (k 1; 2; 3) are de ned exactly as in Section 4.3: X (driving voltage in mesh k Vk  where a summand takes the plus sign if the voltage drives in the direction of Ik , and takes the minus sign in the opposite case. For the network of Fig. 9-12, V1 Va V2 0 V3 Vb
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Instead of using the meshes, or windows of the (planar) network, it is sometimes expedient to choose an appropriate set of loops, each containing one or more meshes in its interior. It is easy to see that two loop currents might have the same direction in one impedance and opposite directions in another. Nevertheless, the preceding rules for writing the Z-matrix and the V-column have been formulated in such a way as to apply either to meshes or to loops. These rules are, of course, identical to those used in Section 4.3 to write the R-matrix and V-column.
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EXAMPLE 9.6 Suppose that the phasor voltage across ZB , with polarity as indicated in Fig. 9-13 is sought. Choosing meshes as in Fig. 9-12 would entail solving for both I1 and I2 , then obtaining the voltage as VB I2 I1 ZB . In Fig. 9-13 three loops (two of which are meshes) are chosen so as to make I1 the only current in ZB . Furthermore, the direction of I1 is chosen such that VB I1 ZB . Setting up the matrix equation:
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SINUSOIDAL STEADY-STATE CIRCUIT ANALYSIS 2 32 3 2 3 0 I1 Va ZD 54 I2 5 4 Va 5 ZD ZE I3 Vb
[CHAP. 9
ZA ZB 4 ZA 0 from which
ZA ZA ZC ZD ZD
Va ZB V VB ZB I1 z a Vb where z is the determinant of the Z-matrix.
ZA ZA ZB ZC ZD
0 ZD ZD ZE
Fig. 9-13
Input and Transfer Impedances The notions of input resistance (Section 4.5) and transfer resistance (Section 4.6) have their exact counterparts in the frequency domain. Thus, for the single-source network of Fig. 9-14, the input impedance is Zinput;r  Vr z Ir rr
where rr is the cofactor of Zrr in z ; and the transfer impedance between mesh (or loop) r and mesh (loop) s is Ztransfer;rs  where rs is the cofactor of Zrs in z . V r z Is rs
Fig. 9-14
As before, the superposition principle for an arbitrary n-mesh or n-loop network may be expressed as V1 Ztransfer;1k Vk 1 Ztransfer; k 1 k Vk Zinput;k Vk 1 Ztransfer; k 1 k Vn Ztransfer;nk
Ik
CHAP. 9]
SINUSOIDAL STEADY-STATE CIRCUIT ANALYSIS
THE NODE VOLTAGE METHOD
The procedure is exactly as in Section 4.4, with admittances replacing reciprocal resistances. A frequency-domain network with n principal nodes, one of them designated as the reference node, requires n 1 node voltage equations. Thus, for n 4, the matrix equation would be 2 32 3 2 3 V1 I1 Y11 Y12 Y13 4 Y21 Y22 Y23 54 V2 5 4 I2 5 Y31 Y32 Y33 V3 I3 in which the unknowns, V1 , V2 , and V3 , are the voltages of principal nodes 1, 2, and 3 with respect to principal node 4, the reference node. Y11 is the self-admittance of node 1, given by the sum of all admittances connected to node 1. Similarly, Y22 and Y33 are the self-admittances of nodes 2 and 3. Y12 , the coupling admittance between nodes 1 and 2, is given by minus the sum of all admittances connecting nodes 1 and 2. It follows that Y12 Y21 . Similarly, for the other coupling admittances: Y13 Y31 , Y23 Y32 . The Y-matrix is therefore symmetric. On the right-hand side of the equation, the I-column is formed just as in Section 4.4; i.e., X (current driving into node k k 1; 2; 3 Ik in which a current driving out of node k is counted as negative. Input and Transfer Admittances The matrix equation of the node voltage method, Y V I is identical in form to the matrix equation of the mesh current method, Z I V Therefore, in theory at least, input and transfer admittances can be de ned by analogy with input and transfer impedances: Yinput;r  Ir Y Vr rr Ir Y Vs rs
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