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The output of a recti er alone does not usually su ce as a power supply, due to its variation in time. The situation is improved by placing a lter between the recti er and the load. The lter acts to suppress the harmonics from the recti ed waveform and to preserve the dc component. A measure of goodness for recti ed waveforms, both ltered and un ltered, is the ripple factor, Fr  A small value, say Fr maximum variation in output voltage vL average value of output voltage VL0 2:8
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Example 2.13. Calculate the ripple factor for the half-wave recti er of Example 2.10 (a) without a lter and (b) with a shunt capacitor lter as in Fig. 2-15(a).
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T (b)
Fig. 2-15 (a) For the circuit of Example 2.10, Fr vL VLm  % 3:14 VL0 VLm =
(b) The capacitor in Fig. 2-15(a) stores energy while the diode allows current to ow, and delivers energy to the load when current ow is blocked. The actual load voltage vL that results with the lter inserted is sketched in Fig. 2-15(b), for which we assume that vS VSm sin !t and D is an ideal diode. For 0 < t t1 , D is forwardbiased and capacitor C charges to the value VSm . For t1 < t t2 , vS is less than vL , reverse-biasing D and causing it to act as an open circuit. During this interval the capacitor is discharging through the load RL , giving vL VSm e t t1 =RL C t1 < t t2 2:9
Over the interval t2 < t t2 , vS forward-biases diode D and again charges the capacitor to VSm . Then vS falls below the value of vL and another discharge cycle identical to the rst occurs. Obviously, if the time constant RL C is large enough compared to T to result in a decay like that indicated in Fig. 2-15(b), a major reduction in vL and a major increase in VL0 will have been achieved, relative to the un ltered recti er. The introduction of two quite reasonable approximations leads to simple formulas for vL and VL0 , and hence for Fr , that are su ciently accurate for design and analysis work:
CHAP. 2]
SEMICONDUCTOR DIODES
1. 2.
If vL is to be small, then  ! 0 in Fig. 2-15(b) and t2 t1 % T. If vL is small enough, then (2.9) can be represented over the interval t1 < t slope of magnitude VSm =RL C.
t2 by a straight line with a
The dashed line labeled Approximate vL in Fig. 2-15(b) implements these two approximations. From right triangle abc, vL V V Sm or vL Sm T RL C fRL C where f is the frequency of vS . Since, under this approximation, VL0 VSm 1 vL 2 and RL C=T fRL C is presumed large, Fr vL 2 1 % VL0 2fRL C 1 fRL C 2:10
Example 2.14. The half-wave recti er of Fig. 2-16(a) is similar to that of Fig. 2-15 except an inductor that acts to reduce harmonics has been added. If source vs is a 120-V (rms) sinusoidal source, use SPICE methods to determine the ripple factor Fr .
Fig. 2-16
SEMICONDUCTOR DIODES
[CHAP. 2
A set of netlist code for analysis of the circuit is shown below where an initial condition voltage (IC 137 V has been placed on the capacitor to eliminate transient conditions.
Ex2_14.CIR - HW rectifier with L-C filter vs 1 0 SIN ( 0V {sqrt(2) *120V} 60Hz) D 1 2 DMOD L 2 3 8mH C 3 0 700uF IC=137V ; Set initial condition RL 3 0 100ohm .MODEL DMOD D() ; Default diode .TRAN 1us 50ms UIC .PROBE .END
Execution of <Ex2_14.CIR> and use of the Probe feature of PSpice leads to the plot of output voltage vL V 3 , shown by Fig. 2-16(b). The maximum and minimum values have been marked. Hence, the ripple voltage is vL 138:93 136:60 2:33 V The running average of Fig. 2-16(b) has the full-period average value of vL marked at the end of three source cycles giving VL0 137:725 V. By (2.8), Fr vL 2:33 0:017 VL0 137:725
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